November 2, 2010

New eTools 8.0 Software Simplifies 45nm ASIC Design
Santa Clara, CA – eASIC Corporation, a provider of NEW ASIC devices, today announced the immediate availability of its eTools 8.0 software suite for implementing 45nm Nextreme-2 designs. The eTools 8.0 tool suite delivers a robust ASIC grade design flow with the simplicity, ease of design, and a cost point that is normally associated with FPGA design tools. By focusing on ease-of-use, and low cost of entry, eASIC is now enabling designers to make a seamless transition to adopting Nextreme-2 devices as a lower cost and lower power alternative to FPGAs and a lower NRE alternative to traditional ASICs.

The eTools 8.0 software suite includes a number of new capabilities that simplify the transition path for designers looking to adopt the advantages of Nextreme-2 devices. These include a user friendly GUI-based design environment (Design Navigator), IP-wizards that facilitate easier integration of IP blocks; a new power estimation tool that enables power estimation based on the RTL; and an easy to use floor planning tool for making optimal macro placements. Designers have the option of performing synthesis using Magma Talus RTL or Synopsys DC tools.

Unlike traditional standard cell ASIC flows, the eTools 8.0 flow enables designers to focus their efforts on achieving their desired functionality and timing and not on arduous complex deep submicron ASIC tasks such as power mesh design, signal integrity, test insertion, DFM (design for manufacture) and clock insertion. As a result, designers are able to rapidly progress from their initial RTL to a netlist-level handoff to eASIC. Nextreme-2’s unique and patented single-via based configuration technology enables eASIC engineers to rapidly tape-out and deliver prototypes in 6 to 8 weeks.

“eASIC is committed to the goal of making ASIC design achievable and affordable for the masses. We are seeing more and more FPGA designers use our technology to reduce the cost and power of their designs. With eTools 8.0 we are taking a giant step on the ease-of-use axis, thus enabling designers to create a rapid, low cost, low risk path to ASIC,” said Dr. Ranko Scepanovic, Senior Vice President, Software and Advanced Technology at eASIC Corporation.

FPGA and ASIC designers can try a free 30-day evaluation of eTools 8.0 and Magma Talus RTL software by visiting


November 2, 2010

New Devices Reduce Power Consumption up to 40% Santa Clara, CA – January 21, 2010 – eASIC Corporation, today announced the immediate availability of two new lower power device options for its eASIC Nextreme Family. The NX750LP and NX750 Nextreme devices are now available with operating voltage down to 1.0V thereby enabling designers to achieve up to 40% lower power consumption. The new 1.0V device options are optimized for applications that require low cost and low power such as smart meters, portable projectors, toys, and handheld medical devices.

eASIC’s Nextreme family is an excellent alternative to standard cell ASIC designs as it provides significantly lower up-front development cost and risk. In addition, eASIC Nextreme provides a lower cost and lower power solution to costly and power hungry FPGAs. The addition of 1.0V device options now enhance the designer’s ability to meet ever shrinking power budgets, achieve longer battery life of their equipment by reducing both static and dynamic power consumption.

“The design wins we are having with these 1.0V devices are giving our customers a market advantage through benefiting from both low cost and low power,” said Jasbinder Bhoot, Vice President of Worldwide Marketing at eASIC Corporation. “We are particularly seeing increased adoption in high volume, hand-held, battery operated applications where we have traditionally not focused,” added Bhoot.

The NX750LP and NX750 low core voltage device options are ideal for designs that require up to 55K Logic Cells (approximately 750K Gates). These devices are available as part of the low cost ASIC-in-a-Box design kits that enable designs to be implemented in as little as 4 weeks.

Pricing and Availability
The 1.0V Nextreme Devices are available now from eASIC. Pricing starts at $3.95 in high volume. Learn more at

ASIC in a Box Design Kit

February 25, 2010

eASIC offers ASIC-in-a-Box Design Kits for only $19,995*
· Achieve up to 80% Lower Power than FPGAs
· Achieve up to 50% Lower Cost than FPGAs
· Implement your eASIC design in as little as 5 weeks
eASIC Nextreme Front-End ASIC-in-a-Box Design Kit includes:
· eASIC eTools 6.8 FE Development Software
· Magma Blast RTL Synthesis Software
· Synthesized Netlist Design Hand-off to eASIC
· 20 Prototype Devices after Tapeout
· Documentation & Tutorials
· JTAG Programming Cable

Learn More Get your FREE 30-day software evaluation

*Promotion ends 31 March, 2010

eASIC announces Low Density Sales Campaign

February 11, 2010

eASIC has announced a Sales Campaign focused on its Front -End ASICin a Box and Design Services Program,this limited time Campaign will allow users of a range of Low Density FPGA’s acess to eASIC’s 90nm NX750 andNX1500 devices and design services at highly attractive price points for bothDesign Translations to eASIC technology,prototype parts and productionquantities of the devices.This program will yield significant cost savingsto companies by reducing their BOM cost for critical components.

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